ソフトウェア開発者向けのFPGA最新動向のまとめ
https://qiita.com/kannkyo/items/0927114c3fa2545e9d76
かなりの時間がたった。
クラウドサービスでFPGAを使うのを着目もしていた。
結局名前も「Altera」に、IntelのFPGA事業は買収前に戻る
https://xtech.nikkei.com/atcl/nxt/column/18/00001/08984/
インテルのプログラマブル・ソリューションズ・グループは、インテル企業である Altera® になりました。
https://www.intel.co.jp/content/www/jp/ja/products/programmable.html
Accelerating Innovators, Providing innovators the flexibility to unleash their ideas and unlock the future.
https://www.altera.com
「最新技術で切り拓くエッジコンピューティング＆FPGAの未来」イベントレポート（主催：アヴネット株式会社）
https://qiita.com/official-columns/event/202504-avnet/?utm_source=qiita&utm_medium=recommend&loclid=5V91EpC8SOe1ef_JUBs4LkQNZVs
アブネットさんお研修を受講したことがある。旧職での研修の講師にもおいでいただいたことがある。
Software defined radio
ZipCPU/sdr
https://github.com/ZipCPU/sdr
The Broadest RFSoM Portfolio
https://www.knowres.com/rfsom/
FPGA Software Defined Radio (SDR)
https://fpga.mit.edu/videos/2019/team06/presentation.pdf
Software Defined Radio
https://www.latticesemi.com/ja-JP/Solutions/Solutions/SolutionsDetails02/Software-Defined-Radio
Software-Defined Radio Transceiver Design Using FPGA-Based System-on-Chip Embedded Platform With Adaptive Digital Predistortion
https://ieeexplore.ieee.org/document/9274350
arXiv
arXiv:2408.09179 [pdf, other] cs.CR
On the Reliability of Radio Frequency Fingerprinting
Authors: Muhammad Irfan, Savio Sciancalepore, Gabriele Oligeri
Abstract: …hardware differences. Nevertheless, RFF techniques depend on the ability to extract information from the PHY layer of the radio spectrum by resorting to Software Defined Radios (SDR). Previous works have highlighted the so-called ``Day-After-Tomorrow'' effect, i.e., an intrinsic issue of… ▽ More
Submitted 17 August, 2024; originally announced August 2024.
arXiv:2404.09660 [pdf, other] cs.NI eess.SP
OpenAirLink: Reproducible Wireless Channel Emulation using Software Defined Radios
Authors: Yash Deshpande, Xianglong Wang, Wolfgang Kellerer
Abstract: …paper presents OpenAirLink(OAL), an open-source channel emulator for reproducible testing of wireless scenarios. OAL is implemented on off-the-shelf software-defined radios (SDR) and presents a smaller-scale alternative to expensive commercially available channel emulators. Path loss and propagation delay are the fundamental aspects of emulating a wireless c… ▽ More
Submitted 15 April, 2024; originally announced April 2024.
arXiv:2311.03480 [pdf, ps, other] astro-ph.IM physics.ins-det
RFSoC Gen3-Based Software-Defined Radio Characterization for the Readout System of Low-Temperature Bolometers
Authors: M. E. García Redondo, T. Muscheid, R. Gartmann, J. M. Salum, L. P. Ferreyro, N. A. Müller, J. D. Bonilla-Neira, J. M. Geria, J. J. Bonaparte, A. Almela, L. E. Ardila-Perez, M. R. Hampel, A. E. Fuster, M. Platino, O. Sander, M. Weber, A. Etchegoyen
Abstract: This work reports the performance evaluation of an SDR readout system based on the latest generation (Gen3) of the AMD's Radio Frequency System-on-Chip (RFSoC) processing platform, which integrates a full-stack processing system and a powerful FPGA with up to 32 high-speed and high-resolution 14-bit Digital-to-Anal… ▽ More
Submitted 8 May, 2024; v1 submitted 6 November, 2023; originally announced November 2023.
Comments: 10 pages, peer reviewed, Journal of Low Temperature Physics special issue: LTD20
arXiv:2307.07319 [pdf, other] eess.SP
The Power of Large Language Models for Wireless Communication System Development: A Case Study on FPGA Platforms
Authors: Yuyang Du, Hongyu Deng, Soung Chang Liew, Kexin Chen, Yulin Shao, He Chen
Abstract: …via HDL poses far greater challenges because of the more complex computation tasks involved. In this paper, we aim to address this challenge by investigating the role of LLMs in FPGA-based hardware development for advanced wireless signal processing. We begin by exploring LLM-assisted code refactoring, reuse, and validation, using an open-source software-def… ▽ More
Submitted 14 July, 2024; v1 submitted 14 July, 2023; originally announced July 2023.
arXiv:2305.13351 [pdf, other] cs.AR cs.NI
Accelerating FPGA-Based Wi-Fi Transceiver Design and Prototyping by High-Level Synthesis
Authors: Thijs Havinga, Xianjun Jiao, Wei Liu, Ingrid Moerman
Abstract: Field-Programmable Gate Array (FPGA)-based Software-Defined Radio (… ▽ More
Submitted 23 May, 2023; originally announced May 2023.
Comments: 7 pages, extended version of poster accepted at FCCM 2023
arXiv:2209.07674 [pdf, other] eess.SP
Free-Space Optical Communications for 6G Wireless Networks: Challenges, Opportunities, and Prototype Validation
Authors: Hong-Bae Jeon, Soo-Min Kim, Hyung-Joo Moon, Do-Hoon Kwon, Joon-Woo Lee, Jong-Moon Chung, Sang-Kook Han, Chan-Byoung Chae, Mohamed-Slim Alouini
Abstract: …including heterogeneous networks with enormous connectivity and wireless backhauls for cellular systems. In this study, we perform video signal transmissions via an FPGA-based FSO communication prototype to investigate the feasibility of an FSO link with a distance of up to 20~km. We use a channel emulator to reliably model turbulence, scintillation, and po… ▽ More
Submitted 23 November, 2022; v1 submitted 15 September, 2022; originally announced September 2022.
Comments: 8 pages, 5 figures
arXiv:2010.08901 [pdf, other] cs.CR
Spectrum-Flexible Secure Broadcast Ranging
Authors: Tien D. Vo-Huu, Triet D. Vo-Huu, Guevara Noubir
Abstract: …to achieve high accuracy and scalability to tens of reflectors even when operating over narrow bands of spectrum. We demonstrate that it can be implemented on popular SDR platforms FPGA and/or hosts (with minimal FPGA modifications). The protocol design, and cryptographically gen… ▽ More
Submitted 26 October, 2020; v1 submitted 17 October, 2020; originally announced October 2020.
Comments: correct function name in figure 1; add protocol diagram in appendix; move appendix to the end of paper
arXiv:2008.01220 [pdf, other] eess.SP
Xilinx RF-SoC-based Digital Multi-Beam Array Processors for 28/60~GHz Wireless Testbeds
Authors: Sravan Pulipati, Viduneth Ariyarathna, Aditya Dhananjay, Mohammed E. Eltayeb, Marco Mezzavilla, Josep M. Jornet, Soumyajit Mandal, Shubhendu Bhardwaj, Arjuna Madanayake
Abstract: …This paper summarizes the authors' recent progress on the design and testing of 28 GHz and 60 GHz fully-digital array processing platforms based on wideband reconfigurable FPGA-based software-defined radios (… ▽ More
Submitted 3 August, 2020; originally announced August 2020.
Comments: 6 pages
arXiv:2007.06389 [pdf, other] cs.CV cs.LG
Term Revealing: Furthering Quantization at Run Time on Quantized DNNs
Authors: H. T. Kung, Bradley McDanel, Sai Qian Zhang
Abstract: …performance (i.e., accuracy or perplexity). We use TR to facilitate tightly synchronized processor arrays, such as systolic arrays, for efficient parallel processing. We show an FPGA implementation that can use a small number of control bits to switch between conventional quantization and TR-enabled quantization with a negligible delay. To enhance TR efficie… ▽ More
Submitted 26 July, 2020; v1 submitted 13 July, 2020; originally announced July 2020.
Comments: 13 pages, 19 figures, 4 tables, To appear in Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC), 2020 Update: Revised writing/figures and added more references for Section IV Update: Revised Section IV writing/figures and added additional references on signed digit representations
arXiv:2003.09525 [pdf, ps, other] eess.SP
Hardware-Software Codesign for Software Defined Radio: IEEE 802.11p receiver case study
Authors: Rafik Zitouni, Hacene Bouaroua, Benaoumeur Senouci
Abstract: Software Defined Radio (SDR) platforms are useful tools to design new wireless technologies or to improve specifications of existing ones. The IEEE 802.11p is the de-facto standard for Wireless Vehicular Ad-hoc NETworks (VANETs). It has been implemented on GNU Radio… ▽ More
Submitted 24 March, 2020; v1 submitted 20 March, 2020; originally announced March 2020.
Comments: 6 pages, 6 figures, RICCES 2017
arXiv:2001.03645 [pdf] eess.SP cs.NI
Extreme Software Defined Radio -- GHz in Real Time
Authors: Eugene Grayver, Alexander Utter
Abstract: …the low Mbps can be processed on low-power ARM processors, and much higher data rates can be supported on large x86 processors. The advantages of all-software development (vs. FPGA/DSP/GPU) are compelling: much wider pool of talent, lower development time and cost, and easier maintenance and porting. However, very high-rate systems (above 100 Mbps) are still… ▽ More
Submitted 10 January, 2020; originally announced January 2020.
Comments: Accepted to 2020 IEEE Aerospace Conference
arXiv:1910.05765 [pdf, other] cs.NI cs.LG eess.SP
Real-Time and Embedded Deep Learning on FPGA for RF Signal Classification
Authors: Sohraab Soltani, Yalin E. Sagduyu, Raqibul Hasan, Kemal Davaslioglu, Hongmei Deng, Tugba Erpek
Abstract: We designed and implemented a deep learning based RF signal classifier on the Field Programmable Gate Array (FPGA) of an embedded software-defined radio platform, DeepRadio, that classifies the signals received through the RF front end to different modulation types in real time and with low power. This classifier implementation successfully captures complex… ▽ More
Submitted 13 October, 2019; originally announced October 2019.
arXiv:1907.02063 [pdf, ps, other] eess.SP cs.NI
TinySDR: Low-Power SDR Platform for Over-the-Air Programmable IoT Testbeds
Authors: Mehrdad Hessar, Ali Najafi, Vikram Iyer, Shyamnath Gollakota
Abstract: …for large scale deployment. We present extensive evaluation of our platform showing it consumes as little as 30 uW of power in sleep mode, which is 10,000x lower than existing SDR platforms. We present two case studies by implementing LoRa and BLE beacons on the platform and achieve sensitivities of -126 dBm and -94 dBm respectively while consuming 11% and 3… ▽ More
Submitted 3 July, 2019; originally announced July 2019.
Comments: 16 pages, accepted to NSDI 2020
arXiv:1809.07805 [pdf] eess.SP
doi 10.1109/ARFTG.2017.8000845
A Millimeter Wave MIMO Testbed for 5G Communications
Authors: Tian Hong Loh, David Cheadle, Philip Miller
Abstract: …short communication distance between the transmitting and receiving antennas. A user-programmable, reconfigurable and real-time signal processing field-programmable gate arrays (FPGAs)-based software defined radio (SDR) system was employed as part of the testbed to validate the system-level performance for a downlink t… ▽ More
Submitted 19 September, 2018; originally announced September 2018.
Comments: 89th ARFTG Microwave Measurement Conference (ARFTG 2017)
arXiv:1711.09311 [pdf, other] eess.SP
doi 10.1117/12.2266543
An adaptive software defined radio design based on a standard space telecommunication radio system API
Authors: Wenhao Xiong, Xin Tian, Genshe Chen, Khanh Pham, Erik Blasch
Abstract: Software defined radio (SDR) has become a popular tool for the implementation and testing for communications performance. The advantage of the… ▽ More
Submitted 25 November, 2017; originally announced November 2017.
arXiv:1705.00115 [pdf] cs.NI
Hardware Accelerated SDR Platform for Adaptive Air Interfaces
Authors: Tarik Kazaz, Christophe Van Praet, Merima Kulin, Pieter Willemen, Ingrid Moerman
Abstract: …platform is proposed for on-the-fly composition of low-power adaptive air interfaces, based on hardware/software co-processing. Compared to traditional Software Defined Radio (SDR) systems that perform computationally-intensive signal processing algorithms in software, consume significantly power and have a large form factor, the proposed platform uses moder… ▽ More
Submitted 28 April, 2017; originally announced May 2017.
Comments: 9 pages, 3 figures
arXiv:1604.05811 [pdf, other] cs.NI
Reliable Physical-layer Network Coding Supporting Real Applications
Authors: Lizhao You, Soung Chang Liew, Lu Lu
Abstract: …ensure reliable packet delivery; 4) an interface to the application layer. We took on the challenge to implement all the above with general-purpose processors in PC through an SDR platform rather than ASIC or FPGA. With all these components, we have successfully demonstrated image exchange with TCP and twoparty video c… ▽ More
Submitted 20 April, 2016; originally announced April 2016.
Comments: 17 pages
arXiv:1009.6132 [pdf] cs.AR
doi 10.5121/ijcnc.2010.2406
Multi-standard programmable baseband modulator for next generation wireless communication
Authors: Indranil Hatai, Indrajit Chakrabarti
Abstract: Considerable research has taken place in recent times in the area of parameterization of software defined radio (SDR) architecture. Parameterization decreases the size of the software to be downloaded and also limits the hardware reconfiguration time. The present paper is based on the design and development of a programmable baseband modulator that perform t… ▽ More
Submitted 9 September, 2010; originally announced September 2010.
Journal ref: International Journal of Computer Networks and Communications (IJCNC). Vol.2, No. 4, pp. 58-71, July 2010
arXiv:1007.4465 [pdf] cs.AR
doi 10.1109/ICM.2009.5418636
FPGA Implementation of a Reconfigurable Viterbi Decoder for WiMAX Receiver
Authors: Sherif Welsen Shaker, Salwa Hussien Elramly, Khaled Ali Shehata
Abstract: Field Programmable Gate Array technology (FPGA) is a highly configurable option for implementing many sophisticated signal processing tasks in Software Defined Radios (… ▽ More
Submitted 26 July, 2010; originally announced July 2010.
arXiv:0809.1403 [pdf, other] physics.ins-det
doi 10.1063/1.3043432
Digital control of force microscope cantilevers using a field programmable gate array
Authors: Jonathan P. Jacky, Joseph L. Garbini, Matthew Ettus, John A. Sidles
Abstract: This report describes a cantilever controller for magnetic resonance force microscopy (MRFM) based on a field programmable gate array (FPGA), along with the hardware and software used to integrate the controller into an experiment. The controller is assembled from a low-cost commercially available software defined radio (… ▽ More
Submitted 8 September, 2008; originally announced September 2008.
Comments: submitted to Review of Scientific Instruments
Journal ref: Rev.Sci.Instrum.79:123705,2008
Ref.
CPUの創り方、Hardware Description Language, Verilog HDL(0)
https://qiita.com/kaizen_nagoya/items/010a48bb83639026a014
趣味(like, hoby and life work)としてのプログラミング言語 C++, python(26) and Verilog HDL(1) coding(51)
https://qiita.com/kaizen_nagoya/items/5e0b06fd5dc2ea29c217
名刺代わりの技術書10選 HDL(2)
https://qiita.com/kaizen_nagoya/items/dc497dcaa5a304fc96c8
slideshare top 10 on kaizenjapan(@kaizen_nagoya) coding(68) HDL(3)
https://qiita.com/kaizen_nagoya/items/2035b961adad19b74c17
STARC RTL設計スタイルガイド ふたたび HDL(4)
https://qiita.com/kaizen_nagoya/items/c6d755b142897d8bbc65
Xilinx: FPGA と Verilog HDL(5) coding(84)
https://qiita.com/kaizen_nagoya/items/6db0b65fb1c227722660
FPGAをクラウドで開発する環境を探し中。HDL(6)
https://qiita.com/kaizen_nagoya/items/cdf429ae3d134bae358e
みんなでCPUを創ろう。新人プログラマ応援 HEL(7)
https://qiita.com/kaizen_nagoya/items/605423527ce8a7fcdbe9
RTL設計スタイルガイド Verilog HDL(8)編 coding(74)
https://qiita.com/kaizen_nagoya/items/c883b9aab40c53c1d259
<この項は書きかけです。順次追記します。>
This article is not completed. I will add some words and/or centences in order.
Este artículo no está completo. Agregaré algunas palabras en orden.
知人資料
' @kazuo_reve 私が効果を確認した「小川メソッド」
https://qiita.com/kazuo_reve/items/a3ea1d9171deeccc04da
' @kazuo_reve 新人の方によく展開している有益な情報
https://qiita.com/kazuo_reve/items/d1a3f0ee48e24bba38f1
' @kazuo_reve Vモデルについて勘違いしていたと思ったこと
https://qiita.com/kazuo_reve/items/46fddb094563bd9b2e1e
自己記事一覧
Qiitaで逆リンクを表示しなくなったような気がする。時々、スマフォで表示するとあらわっることがあり、完全に削除したのではなさそう。
４月以降、せっせとリンクリストを作り、統計を取って確率を説明しようとしている。
2025年２月末を目標にしている。
一覧の一覧( The directory of directories of mine.) Qiita(100)
https://qiita.com/kaizen_nagoya/items/7eb0e006543886138f39
仮説（0）一覧（目標100現在40）
https://qiita.com/kaizen_nagoya/items/f000506fe1837b3590df
Qiita(0)Qiita関連記事一覧（自分）
https://qiita.com/kaizen_nagoya/items/58db5fbf036b28e9dfa6
Error一覧 error(0)
https://qiita.com/kaizen_nagoya/items/48b6cbc8d68eae2c42b8
C++ Support(0)
https://qiita.com/kaizen_nagoya/items/8720d26f762369a80514
Coding(0) Rules, C, Secure, MISRA and so on
https://qiita.com/kaizen_nagoya/items/400725644a8a0e90fbb0
Ethernet 記事一覧 Ethernet(0)
https://qiita.com/kaizen_nagoya/items/88d35e99f74aefc98794
Wireshark 一覧 wireshark(0)、Ethernet(48)
https://qiita.com/kaizen_nagoya/items/fbed841f61875c4731d0
線網（Wi-Fi）空中線(antenna)(0) 記事一覧(118/300目標)
https://qiita.com/kaizen_nagoya/items/5e5464ac2b24bd4cd001
なぜdockerで機械学習するか 書籍・ソース一覧作成中 (目標100)
https://qiita.com/kaizen_nagoya/items/ddd12477544bf5ba85e2
プログラムちょい替え（0）一覧:4件
https://qiita.com/kaizen_nagoya/items/296d87ef4bfd516bc394
言語処理100本ノックをdockerで。python覚えるのに最適。:10+12
https://qiita.com/kaizen_nagoya/items/7e7eb7c543e0c18438c4
Python(0)記事をまとめたい。
https://qiita.com/kaizen_nagoya/items/088c57d70ab6904ebb53
安全（0）安全工学シンポジウムに向けて: 21
https://qiita.com/kaizen_nagoya/items/c5d78f3def8195cb2409
プログラマによる、プログラマのための、統計(0)と確率のプログラミングとその後
https://qiita.com/kaizen_nagoya/items/6e9897eb641268766909
転職(0)一覧
https://qiita.com/kaizen_nagoya/items/f77520d378d33451d6fe
技術士(0)一覧
https://qiita.com/kaizen_nagoya/items/ce4ccf4eb9c5600b89ea
Reserchmap(0) 一覧
https://qiita.com/kaizen_nagoya/items/506c79e562f406c4257e
物理記事 上位100
https://qiita.com/kaizen_nagoya/items/66e90fe31fbe3facc6ff
量子(0) 計算機, 量子力学
https://qiita.com/kaizen_nagoya/items/1cd954cb0eed92879fd4
数学関連記事１００
https://qiita.com/kaizen_nagoya/items/d8dadb49a6397e854c6d
coq(0) 一覧
https://qiita.com/kaizen_nagoya/items/d22f9995cf2173bc3b13
統計(0)一覧
https://qiita.com/kaizen_nagoya/items/80d3b221807e53e88aba
図(0) state, sequence and timing. UML and お絵描き
https://qiita.com/kaizen_nagoya/items/60440a882146aeee9e8f
色(0) 記事100書く切り口
https://qiita.com/kaizen_nagoya/items/22331c0335ed34326b9b
品質一覧
https://qiita.com/kaizen_nagoya/items/2b99b8e9db6d94b2e971
言語・文学記事 １００
https://qiita.com/kaizen_nagoya/items/42d58d5ef7fb53c407d6
医工連携関連記事一覧
https://qiita.com/kaizen_nagoya/items/6ab51c12ba51bc260a82
水の資料集(0) 方針と成果
https://qiita.com/kaizen_nagoya/items/f5dbb30087ea732b52aa
自動車 記事 １００
https://qiita.com/kaizen_nagoya/items/f7f0b9ab36569ad409c5
通信記事１００
https://qiita.com/kaizen_nagoya/items/1d67de5e1cd207b05ef7
日本語（０）一欄
https://qiita.com/kaizen_nagoya/items/7498dcfa3a9ba7fd1e68
英語(0) 一覧
https://qiita.com/kaizen_nagoya/items/680e3f5cbf9430486c7d
音楽 一覧(0)
https://qiita.com/kaizen_nagoya/items/b6e5f42bbfe3bbe40f5d
「@kazuo_reve 新人の方によく展開している有益な情報」確認一覧
https://qiita.com/kaizen_nagoya/items/b9380888d1e5a042646b
鉄道（０）鉄道のシステム考察はてっちゃんがてつだってくれる
https://qiita.com/kaizen_nagoya/items/faa4ea03d91d901a618a
OSEK OS設計の基礎 OSEK(100)
https://qiita.com/kaizen_nagoya/items/7528a22a14242d2d58a3
coding (101) 一覧を作成し始めた。omake:最近のQiitaで表示しない5つの事象
https://qiita.com/kaizen_nagoya/items/20667f09f19598aedb68
官公庁・学校・公的団体（NPOを含む）システムの課題、官（０）
https://qiita.com/kaizen_nagoya/items/04ee6eaf7ec13d3af4c3
「はじめての」シリーズ ベクタージャパン
https://qiita.com/kaizen_nagoya/items/2e41634f6e21a3cf74eb
AUTOSAR(0)Qiita記事一覧, OSEK(75)
https://qiita.com/kaizen_nagoya/items/89c07961b59a8754c869
プログラマが知っていると良い「公序良俗」
https://qiita.com/kaizen_nagoya/items/9fe7c0dfac2fbd77a945
LaTeX(0) 一覧
https://qiita.com/kaizen_nagoya/items/e3f7dafacab58c499792
自動制御、制御工学一覧（０）
https://qiita.com/kaizen_nagoya/items/7767a4e19a6ae1479e6b
Rust(0) 一覧
https://qiita.com/kaizen_nagoya/items/5e8bb080ba6ca0281927
programの本質は計画だ。programは設計だ。
https://qiita.com/kaizen_nagoya/items/c8545a769c246a458c27
登壇直後版 色使い(JIS安全色) Qiita Engineer Festa 2023〜私しか得しないニッチな技術でLT〜 スライド編 0.15
https://qiita.com/kaizen_nagoya/items/f0d3070d839f4f735b2b
プログラマが知っていると良い「公序良俗」
https://qiita.com/kaizen_nagoya/items/9fe7c0dfac2fbd77a945
逆も真：社会人が最初に確かめるとよいこと。OSEK(69)、Ethernet(59)
https://qiita.com/kaizen_nagoya/items/39afe4a728a31b903ddc
統計の嘘。仮説（127）
https://qiita.com/kaizen_nagoya/items/63b48ecf258a3471c51b
自分の言葉だけで論理展開できるのが天才なら、文章の引用だけで論理展開できるのが秀才だ。仮説（136）
https://qiita.com/kaizen_nagoya/items/97cf07b9e24f860624dd
参考文献駆動執筆(references driven writing)・デンソークリエイト編
https://qiita.com/kaizen_nagoya/items/b27b3f58b8bf265a5cd1
「何を」よりも「誰を」。１０年後のために今見習いたい人たち
https://qiita.com/kaizen_nagoya/items/8045978b16eb49d572b2
Qiitaの記事に３段階または５段階で到達するための方法
https://qiita.com/kaizen_nagoya/items/6e9298296852325adc5e
出力(output)と呼ばないで。これは状態(state)です。
https://qiita.com/kaizen_nagoya/items/80b8b5913b2748867840
祝休日・謹賀新年 2025年の目標
https://qiita.com/kaizen_nagoya/items/dfa34827932f99c59bbc
Qiita 1年間をまとめた「振り返りページ」＠2024
https://qiita.com/kaizen_nagoya/items/ed6be239119c99b15828
2024 参加・主催Calendarと投稿記事一覧 Qiita(248)
https://qiita.com/kaizen_nagoya/items/d80b8fbac2496df7827f
主催Calendar2024分析 Qiita(254)
https://qiita.com/kaizen_nagoya/items/15807336d583076f70bc
Calendar 統計
https://qiita.com/kaizen_nagoya/items/e315558dcea8ee3fe43e
LLM 関連 Calendar 2024
https://qiita.com/kaizen_nagoya/items/c36033cf66862d5496fa
Large Language Model Related Calendar
https://qiita.com/kaizen_nagoya/items/3beb0bc3fb71e3ae6d66
博士論文 Calendar 2024 を開催します。
https://qiita.com/kaizen_nagoya/items/51601357efbcaf1057d0
博士論文(0)関連記事一覧
https://qiita.com/kaizen_nagoya/items/8f223a760e607b705e78
coding (101) 一覧を作成し始めた。omake:最近のQiitaで表示しない5つの事象
https://qiita.com/kaizen_nagoya/items/20667f09f19598aedb68
あなたは「勘違いまとめ」から、勘違いだと言っていることが勘違いだといくつ見つけられますか。人間の間違い(human error(125))の種類と対策
https://qiita.com/kaizen_nagoya/items/ae391b77fffb098b8fb4
プログラマの「プログラムが書ける」思い込みは強みだ。３つの理由。仮説（168）統計と確率(17) , OSEK(79)
https://qiita.com/kaizen_nagoya/items/bc5dd86e414de402ec29
出力(output)と呼ばないで。これは状態(state)です。
https://qiita.com/kaizen_nagoya/items/80b8b5913b2748867840
これからの情報伝達手段の在り方について考えてみよう。炎上と便乗。
https://qiita.com/kaizen_nagoya/items/71a09077ac195214f0db
ISO/IEC JTC1 SC7 Software and System Engineering
https://qiita.com/kaizen_nagoya/items/48b43f0f6976a078d907
アクセシビリティの知見を発信しよう！（再び）
https://qiita.com/kaizen_nagoya/items/03457eb9ee74105ee618
統計論及確率論輪講（再び）
https://qiita.com/kaizen_nagoya/items/590874ccfca988e85ea3
読者の心をグッと惹き寄せる7つの魔法
https://qiita.com/kaizen_nagoya/items/b1b5e89bd5c0a211d862
「@kazuo_reve 新人の方によく展開している有益な情報」確認一覧
https://qiita.com/kaizen_nagoya/items/b9380888d1e5a042646b
ソースコードで議論しよう。日本語で議論するの止めましょう（あるプログラミング技術の議論報告）
https://qiita.com/kaizen_nagoya/items/8b9811c80f3338c6c0b0
脳内コンパイラの3つの危険
https://qiita.com/kaizen_nagoya/items/7025cf2d7bd9f276e382
心理学の本を読むよりはコンパイラ書いた方がよくね。仮説（34）
https://qiita.com/kaizen_nagoya/items/fa715732cc148e48880e
NASAを超えるつもりがあれば読んでください。
https://qiita.com/kaizen_nagoya/items/e81669f9cb53109157f6
データサイエンティストの気づき!「勉強して仕事に役立てない人。大嫌い!!」『それ自分かも?』ってなった!!!
https://qiita.com/kaizen_nagoya/items/d85830d58d8dd7f71d07
「ぼくの好きな先生」「人がやらないことをやれ」プログラマになるまで。仮説（37）
https://qiita.com/kaizen_nagoya/items/53e4bded9fe5f724b3c4
なぜ経済学徒を辞め、計算機屋になったか（経済学部入学前・入学後・卒業後対応） 転職(1)
https://qiita.com/kaizen_nagoya/items/06335a1d24c099733f64
プログラミング言語教育のXYZ。 仮説（52）
https://qiita.com/kaizen_nagoya/items/1950c5810fb5c0b07be4
【24卒向け】9ヶ月後に年収１０００万円を目指す。二つの関門と三つの道。
https://qiita.com/kaizen_nagoya/items/fb5bff147193f726ad25
「【25卒向け】Qiita Career Meetup for STUDENT」予習の勧め
https://qiita.com/kaizen_nagoya/items/00eadb8a6e738cb6336f
大学入試不合格でも筆記試験のない大学に入って卒業できる。卒業しなくても博士になれる。
https://qiita.com/kaizen_nagoya/items/74adec99f396d64b5fd5
全世界の不登校の子供たち「博士論文」を書こう。世界子供博士論文遠隔実践中心 安全(99)
https://qiita.com/kaizen_nagoya/items/912d69032c012bcc84f2
日本のプログラマが世界で戦える16分野。仮説(53),統計と確率(25) 転職(32)、Ethernet(58)
https://qiita.com/kaizen_nagoya/items/a7e634a996cdd02bc53b
小川メソッド 覚え（書きかけ）
https://qiita.com/kaizen_nagoya/items/3593d72eca551742df68
DoCAP（ドゥーキャップ）って何ですか？
https://qiita.com/kaizen_nagoya/items/47e0e6509ab792c43327
views 20,000越え自己記事一覧
https://qiita.com/kaizen_nagoya/items/58e8bd6450957cdecd81
Views１万越え、もうすぐ１万記事一覧 最近いいねをいただいた213記事
https://qiita.com/kaizen_nagoya/items/d2b805717a92459ce853
amazon 殿堂入りNo1レビュアになるまで。仮説(102)
https://qiita.com/kaizen_nagoya/items/83259d18921ce75a91f4
100以上いいねをいただいた記事16選
https://qiita.com/kaizen_nagoya/items/f8d958d9084ffbd15d2a
水道局10年(1976,4-1986,3)を振り返る
https://qiita.com/kaizen_nagoya/items/707fcf6fae230dd349bf
小川清最終講義、最終講義（再）計画, Ethernet(100) 英語(100) 安全(100)
https://qiita.com/kaizen_nagoya/items/e2df642e3951e35e6a53
＜この記事は個人の過去の経験に基づく個人の感想です。現在所属する組織、業務とは関係がありません。＞
This article is an individual impression based on my individual experience. It has nothing to do with the organization or business to which I currently belong.
Este artículo es una impresión personal basada en mi experiencia personal. No tiene nada que ver con la organización o empresa a la que pertenezco actualmente.
文書履歴(document history)
ver. 0.01 初稿 20250428
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Thank you very much for reading to the last sentence.
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Muchas gracias por leer hasta la última oración.
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