Intel
インテルFPGAの利用は、altera時代を含め、あまりない。
| fpga | intel | xininx |
|---|---|---|
| training | 1 | 9 |
| chip used | 2 | 8 |
| working time | 1 | 99 |
Xilinx
https://www.xilinx.com/
インテルFPGAを使ったクラウドサービスを探したい。
まず、FPGAをクラウドで開発する環境を探し中。
cloud
3 Essential Considerations For FPGA Design In The Cloud
Designing for FPGAs in the Cloud, Naif Tarafdar, Nariman Eskandari, Thomas Lin, and Paul Chow University of Toronto
References
[1] Amazon Web Services Inc., Amazon Web Services,
2014. [Online]. Accessed: Nov. 16, 2016. Available:
http://aws.amazon.com
[2] J.-M. Kang et al., “SAVI testbed: Control and
management of converged virtual ICT resources,” in Proc. IFIP/IEEE Int. Symp. Integr. Network Management, 2013, pp. 664–667.
[3] A. Putnum et al., “A reconfigurable fabric for accelerating large-scale datacenter services,” in Proc. 2014 ACM/IEEE 41st Int. Symp. Comp. Architecture, 2014, pp. 13–24.
[4] O. Sefraoui et al., “OpenStack: Toward an open-source solution for cloud computing,” Int. J. Comp. Appl.,
vol. 55, no. 3, pp. 38–42, 2012.
[5] Xilinx Inc., SDAccel Development Environment, 2016. [Online]. Accessed: Nov. 12, 2016. Available: https:// www.xilinx.com/products/design-tools/software-zone/ sdaccel.html
[6] N. Tarafdar, T. Lin, E. Fukuda, H. Bannazadeh,
A. Leon-Garcia, and P. Chow, “Enabling flexible network FPGA clusters in a heterogenous cloud data center,” in Proc. Int. Symp. Field-Programmable Gate Arrays, 2017, pp. 237–246.
[7] N. McKeown, T. Anderson, H. Balakrishnan, G. Parulkar, L. Peterson, J. Rexford et al., “OpenFlow: Enabling innovation in campus networks,” in Proc. ACM SIGCOMM Comp. Commun. Rev., vol. 38, no. 2, pp. 69–74, 2008.
[8] S. Byma, N. Tarafdar, T. Xu, H. Bannazadeh,
A. Leon-Garcia, and P. Chow, “Expanding OpenFlow capabilities with virtualized reconfigurable hardware,” in Proc. FPGA ACM/SIGDA Int. Symp. Field- Programmable Gate Arrays, 2015, pp. 94–97.
[9] The Khronos Group, OpenCL Standard, 2015. [Online]. Available: https://www.khronos.org/opencl/
[10] IBM Research, OpenPOWER Cloud: Accelerating Cloud Computting, 2016. [Online]. Available: https:// www.research.ibm.com/labs/china/supervessel.html
[11] A. Caulfield et al., “A cloud-scale acceleration architecture,” in Proc. 49th Annu. IEEE/ACM Int. Symp. Microarchitecture, Oct. 2016, pp. 1–13.
[12] Amazon,AmazonEC2F1Instances,2016.[Online]. Available: https://aws.amazon.com/ec2/instance-types/f1/ [13] DPDKIntel,DataPlaneDevelopmentKit,2014.[Online].
Accessed October 12, 2016. Available: http://dpdk.org
Enabling FPGA-as-a-Service in the Cloud with hCODE Platform Qian ZHAO†a), Motoki AMAGASAKI†, Masahiro IIDA†, Morihiro KUGA†,
References
[1] M. Jacobsen, D. Richmond, M. Hogains, and R. Kastner, “RIFFA 2.1: A reusable integration framework for FPGA accelerators,” ACM Trans. Reconfigurable Technology and Systems, vol.8, no.4, Article No. 22, Oct. 2015.
[2] XILLYBUS Ltd., http://xillybus.com
[3] K. Vipin, S. Shreejith, D. Gunasekera, S.A. Fahmy, and N. Kapre,
“System-level FPGA device driver with high-level synthesis sup- port,” Proc. 2013 International Conference on Field Programmable Technology(ICFPT), pp.128–135, Dec. 2013.
[4] A. Putnam, A.M. Caulfield, E.S. Chung, D. Chiou, K. Constantinides, J. Demme, H. Esmaeilzadeh, J. Fowers, G.P. Gopal, J. Gray, M. Haselman, S. Hauck, S. Heil, A. Hormati, J.-Y. Kim, S. Lanka, J. Larus, E. Peterson, S. Pope, A. Smith, J. Thong, P.Y. Xiao, and D. Burger, “A reconfigurable fabric for accelerating large-scale datacenter services,” ACM/IEEE 41st International Symposium on Computer Architecture (ISCA), pp.13–24, June 2014.
[5] http://opencores.org
[6] https://cocoapods.org
[7] F. Chen, Y. Shan, Y. Zhang, Y. Wang, H. Franke, X. Chang, and K.
Wang, “Enabling FPGAs in the cloud,” Proc. 11th ACM Conference
on Computing Frontiers, Article No. 3, May 2014.
[8] S. Byma, J.G. Steffan, H. Bannazadeh, A.L. Garcia, and P. Chow, “FPGAs in the Cloud: Booting Virtualized Hardware Accelerators with OpenStack,” Proc. 22nd International Symposium on Field- Programmable Custom Computing Machines, pp.109–116, May
2014.
[9] J. Weerasinghe, F. Abel, C. Hagleitner, and A. Herkersdorf, “En-
abling FPGAs in Hyperscale Data Centers,” 2015 IEEE 12th Intl Conf on Ubiquitous Intelligence and Computing and 2015 IEEE 12th Intl Conf on Autonomic and Trusted Computing and 2015 IEEE 15th Intl Conf on Scalable Computing and Communica- tions and Its Associated Workshops (UIC-ATC-ScalCom), pp.1078– 1086, Aug. 2015.
[10] M. Huang, D. Wu, C.H. Yu, Z. Fang, M. Interlandi, T. Condie, and J. Cong, “Programming and Runtime Support to Blaze FPGA Accel- erator Deployment at Datacenter Scale,” Proc. Seventh ACM Sym- posium on Cloud Computing, pp.456–469, Oct. 2016.
[11] A. Salah, http://opencores.org/project,aes-128 pipelined encryption, overview, June 2016.
[12] F. Winterstein, S. Bayliss, and G.A. Constantinides, “High-level synthesis of dynamic data structures: a case study using Vivado HLS,” Proc. International Conference on Field Programmable Tech- nology, pp.362–365, Dec. 2013.
おお、末吉さんの参加されている論文だ。
STARC RTL 設計スタイルガイドに取り組みはじめたのは、末吉さんからの助言による。
おかげさまで、自分の資料のslideshareに掲載している記事のうち、一番アクセスが多いのがFPGAです。
slideshare top 10 on kaizenjapan(@kaizen_nagoya)
Cloud FPGA
FPGA designers turn to machine learning in the cloud
https://embeddedcomputing.com/technology/ai-machine-learning/fpga-designers-turn-to-machine-learning-in-the-cloud
参考資料
RTL設計スタイルガイド Verilog HDL編
RTL設計スタイルガイド Verilog HDL編(System Verilog対応版）
FPGA と Verilog HDL
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＜この記事は個人の過去の経験に基づく個人の感想です。現在所属する組織、業務とは関係がありません。＞
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ver. 0.02 ありがとう追記 20230701
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