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Ultra96 向け Debian GNU/Linux (v2018.2版) の構築(FSBL編)

Last updated at Posted at 2018-10-26

はじめに

Ultra96 に Debian GNU/Linux (v2018.2版) を構築する方法について、具体的な方法をいくつかに分けて説明します。

この記事では、Ultra96 の Boot Loader で使うための FSBL(First Stage Boot Loader) の構築について説明をします。

必要な環境

  • Vivado SDK 2018.2

Sample FPGA Design の構築

FSBL の構築には Sample FPGA Design のハードウェア情報が必要です。「Ultra96 向け Debian GNU/Linux (v2018.2版) の構築(Sample FPGA Design編)」の通りに target/Ultra96/build-v2018.2/fpga/project.sdk/design_1_wrapper.hdf を作っておきます。

FSBL の構築

ここでは Vivado の hsi(Hardware Software Interface) を使って構築する方法を示します。GUI を使って手で入力するのは面倒なので Tcl スクリプトファイルを用意しています。 Tcl スクリプトの詳しい内容は「Vivado SDK でZynq FSBL(First Stage Boot Loader)をビルドするTclスクリプト(hsi編)」を参照してください。

target/Ultra96/build-v2018.2/fpga/build_zynqmp_fsbl.hsi
#!/usr/bin/tclsh

set app_name          "fsbl"
set app_type          "zynqmp_fsbl"
set hwspec_file       "design_1_wrapper.hdf"
set proc_name         "psu_cortexa53_0"
set project_name      "project"
set project_dir       [pwd]
set sdk_workspace     [file join $project_dir $project_name.sdk]
set app_dir           [file join $sdk_workspace $app_name]
set app_release_dir   [file join [pwd] ".." ]
set app_release_elf   "zynqmp_fsbl.elf"

set hw_design         [open_hw_design [file join $sdk_workspace $hwspec_file]]

generate_app -hw $hw_design -os standalone -proc $proc_name -app $app_type -compile -dir $app_dir
file copy -force [file join $app_dir "executable.elf"] [file join $app_release_dir $app_release_elf]

build_zynqmp_fsbl.hsi を Vivado で実行することにより target/Ultra96/build-v2018.2/zynqmp_fsbl.elf が生成されます。

vivado% cd target/Ultra96/build-v2018.2/fpga/
vivado% hsi -mode tcl -source build_zynqmp_fsbl.hsi

参考

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