Rubyが得意な半導体屋です (Ruby/SystemVerilog/UVMが得意)
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神奈川
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$ analyze @taichi-ishitani
posted articles:
- FPGA:75%
- SystemVerilog:75%
- Verilog:67%
- HDL:42%
- VHDL:33%
answered questions:
- No data