Rubyが得意な半導体屋です (Ruby/SystemVerilog/UVMが得意)
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神奈川
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$ analyze @taichi-ishitani
posted articles:
- SystemVerilog:79%
- Verilog:64%
- FPGA:64%
- VHDL:36%
- HDL:36%
answered questions:
- No data