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@vega77
主にLSIハード設計/検証の人。あとC/C++も。最近は趣味でラズパイやPythonや機械学習やディープラーニングも。

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$ analyze @vega77

posted articles:
  • SystemVerilog:
    67%
  • Verilog:
    47%
  • HDL:
    40%
  • VerilogHDL:
    40%
  • UVM:
    27%
answered questions:
  • No data