Help us understand the problem. What is going on with this user?
@ryo_i6
$ analyze @ryo_i6
posted articles
  • VHDL:80%
  • FPGA:27%
  • GHDL:27%
  • SystemVerilog:20%
  • Vunit:20%
LGTMed articles
  • FPGA:35%
  • Vivado:17%
  • xilinx:13%
  • SystemVerilog:11%
  • Linux:9%
answered questions
    No data