AUTOSARが2023年版、R23-11を公開しました。
https://www.autosar.org/fileadmin/standards/R23-11/FO/AUTOSAR_FO_TR_TimingAnalysis.pdf
R22-11
https://www.autosar.org/fileadmin/standards/R22-11/FO/AUTOSAR_TR_TimingAnalysis.pdf
R21-11
https://www.autosar.org/fileadmin/standards/R21-11/FO/AUTOSAR_TR_TimingAnalysis.pdf
R20-11
https://www.autosar.org/fileadmin/standards/R20-11/FO/AUTOSAR_TR_TimingAnalysis.pdf
R19-11
URL不明
文書は検索してダウンロードできます。
https://www.autosar.org/
<この項は書きかけです。順次追記します。>
This article is not completed. I will add some words in order.
Release Overviews
AUTOSARには現在3つの分類があります。Foundation, CAN OSEK/VDXのClassic Platform, Ethernet/TCP/IP POSIXのAdaptive Platform.
Foundation Release Overview, AUTOSAR 781, R23-11, FO
https://qiita.com/kaizen_nagoya/items/f249bdb8c313d8bff883
Classic Platform Release Overview, AUTOSAR No.0 ,R23-11, CP
https://qiita.com/kaizen_nagoya/items/9d22c8722cbc0f42b137
Adaptive Platform Release Overview, AUTOSAR 782, R23-11, AP
https://qiita.com/kaizen_nagoya/items/13a104606a34fe24fcf7
Qiita 記事一覧
Autosar Foundation R23-11 一覧
https://qiita.com/kaizen_nagoya/items/c30674cb2dac2fcbbd04
AUTOSAR Adaptive Platform R23-11一覧
https://qiita.com/kaizen_nagoya/items/1dece8799a730367b0dc
Autosar Classic Platform R23-11 一覧
https://qiita.com/kaizen_nagoya/items/f770f6c2906e1dcbf180
文書変更(Document Change)
• Added System Level Logical Execution Time
• Reworked functional level use-cases in chapter 4
• Updated TIMEX to ARTI mapping in appendix B
• Updates on use-cases and improvements
用語(terms)
| Term | Description |
|---|---|
| ASA | Active Steering Actuator |
| AUTOSAR | AUTomotive Open System ARchitecture |
| BSW | Basic Software |
| CAN | Controller Area Network |
| COM | Communication module |
| CPU | Central Processing Unit |
| DES | Discrete Event Simulation |
| E2E | End to end |
| ECU | Electrical Control Unit |
| ID | Identifier |
| I/O | Input/Output |
| LIN | Local Interconnect Network |
| NW | Network |
| PIL | Processor-In-The-Loop |
| PDU | Protocol Data Unit |
| RE | Runnable Entities |
| RTE | Runtime Environment |
| SW-C | Software Component |
| SPEM | Software Process Engineering Meta-Model |
| TD | Timing Description |
| TIMEX | AUTOSAR Timing Extensions [2] |
| UC | Use-Case |
| UML | Unified Modeling Language |
| WCET | Worst case execution time |
| WCRT | Worst case response time |
| VFB | Virtual Functional Bus |
Glossary of Terms
整理予定。
| Term | Synonym | Definition |
|---|---|---|
| Event-triggered Frame | Sporadic Frame | A frame that is sent on an event triggered by the application independent from a communication schedule. The event- triggered sending is limited by a debounce time which specifies the shortest allowed temporal distance between two occurrences. |
| Accuracy | The accuracy is the closeness to the true value. For the worst case of a timing property it describes the maximum overestimation. | |
| Cause-Effect Chain | A cause-effect chain represents the data-flow among com- municating components, by relating read events of a con- sumer component to the corresponding write events of a producer component. | |
| Execution Time | The execution time is the total time that the function needs to be assigned the resource in order to complete.The hyperperiod is the least common multiple of all periods in a system.Smallest transmittable information unit on a resource (e.g. frame).ref. Section 8.1. The load of the CPU for servicing interrupts. | |
| Event Chain | An event chain describes a causal order for a set of func- tionally dependent timing events. (See TimingDescription- EventChain in [2]) | |
| Frame | Message | A frame is a data package sent over a communication medium. This element describes the structure of data (OSI layer 2) sent on a channel. For example, a frame on CAN and FlexRay. A commonly used synonym is “message”. |
| Hyperperiod | ||
| Information Packages | ||
| Interconnect LET | ||
| Interrupt Load | ||
| LET Task | ||
| ref. Section 8.1. | ||
| Load | ||
| Utilization | ||
| The load is the total share of time that a resource is used. Please note that within the context of this document the terms load and utilization are used synonymously. The term load as in the number of users waiting for a resource to become available, is not considered in this document. | ||
| Logging | Logging is the activity of providing arbitrary, not necessar- ily correlated, informational data by software. | |
| Logging collects information to understand the behavior of one or multiple programs running on a real system. In contrast to Tracing, the focus is on collecting information explicitly added by a software developer on source code level. | ||
| Based on the requested Log Level, logging may have an timing and/or load impact on the system, which has to be considered during further analysis. | ||
| Examples: Error logging, Printf output, ara::log | ||
| Period | ||
| Stuff Bit | ||
| System Parameter | ||
| Timing Task | ||
| The time period between two activation events of the same frame(network) or task(ECU). | ||
| In CAN frames, a bit of opposite polarity is inserted after five consecutive bits of the same polarity. | ||
| A quantity influencing the timing behavior of the system. | ||
| A number of steps to accomplish a specific goal (see 9 “Description of Timing Tasks”). | ||
| Response Time | ||
| Latency | ||
| Response time is the time between the occurrence of an event until it is processed. E.g. The time between the transmission request of a message until its reception or the time between activation of a function and its completion. | ||
| Schedulable Entity | ||
| A schedulable entity is defining an execution that can oc- cupy time on a CPU or on a network resource. The order of execution is decided by scheduling algorithms. Schedu- lable entities are for example tasks, processes and frames. | ||
| Timing Constraint | ||
| A timing constraint may have two different interpretation alternatives. On the one hand, it may define a restriction for the timing behavior of the system (e.g. minimum (max- imum) latency bound for a certain event sequence). In this case, a timing constraint is a requirement which the sys- tem must fulfill. On the other hand, a timing constraint may define a guarantee for the timing behavior of the system. In this case, the system developer guarantees that the sys- tem has a certain behavior with respect to timing (e.g. a timing event is guaranteed to occur periodically with a cer- tain maximum variation). Compare AUTOSAR Timing Ex- tension [2] | ||
| Timing Method | ||
| Technique | ||
| Defines an ordered number of steps to derive particular timing related work products (e.g. timing property, timing model) | ||
| Timing Model | ||
| A timing model collects all relevant timing information in one single place, typically tool-based. The model can be used to describe the timing behavior or it can be used to generate timing related configuration files. | ||
| Timing Property | ||
| A timing property defines the state or value of a timing rel- evant aspect within the system (e.g. the execution time bounds for a RunnableEntity or the priority of a task). Thus, a property does not represent a constraint for the system, but a somehow gathered (e.g. measured, esti- mated or determined) or defined attribute of the system. | ||
| Tracing | ||
| Tracing is the activity of recording run-time information over a certain period of time by observing a real system. Tracing collects events of selected types over time and stores the information persistently in a so called "trace buffer". For proper timing measurement, the events may be stored together with a time stamp. Depending on the tracing method, the trace buffer may be on-board or off- board. Depending on the trace method, tracing may or may not have a timing impact on the system. If it has, the impact has to be considered when doing further anal- ysis. The recording may be done by software solutions (e.g. code instrumentation), hardware assisted solutions (e.g. CPU instruction flow tracing, Ethernet sniffers) or a combination of them. The trace buffer may be analyzed and visualized offline, providing information about the in- ternal behaviour of the system. | ||
| Examples: ARTI, VFB Tracing, L&T | ||
| Use-case Scenario | ||
| Work Product | ||
| Typical problem, broken down into tasks | ||
| See SPEM [4]. | ||
| Worst case | ||
| The term “worst case” denotes an upper bound on any value a certain property can take during run-time. This is usually different from and may never be smaller than the maximum value observed in the actual system. Typically worst-case values are derived using static analyses based on models of the system. |
References
[1] Methodology for Classic Platform AUTOSAR_CP_TR_Methodology
[2] Specification of Timing Extensions for Classic Platform AUTOSAR_CP_TPS_TimingExtensions
[3] Explanation of Adaptive Platform Design AUTOSAR_AP_EXP_PlatformDesign
[4] Software Process Engineering Meta-Model Specification http://www.omg.org/spec/SPEM/2.0/
[5] Embedded Systems Development, from Functional Models to Implementations
[6] System-level Logical Execution Time:Augmenting the Logical Execution Time Paradigm for Distributed Real-time Automotive Software
[7] The evolution of real-time programming
[8] Giotto:a time-triggered language for embedded programming
[9] EAST-ADL - Model Domain Specification http://www.east-adl.info/Specification.html
[10] Tool Support for the Analysis of TADL2 Timing Constraints using TimeSquare http://hal.inria.fr/docs/00/85/06/73/PDF/paper.pdf
[11] Unified Modeling Language:Superstructure, Version 2.0, OMG Available Specifi- cation, ptc/05-07-04
http://www.omg.org/cgi-bin/apps/doc?formal/05-07-04
[12] System Modeling Language (SysML) http://www.omg.org/spec/SysML/1.3/
[13] UML Profile for Modelling and Analysis of Real-Time and Embedded systems (MARTE) http://www.omg.org/spec/MARTE/1.1/
[14] Architecture Analysis and Design Language (AADL) AS-5506A http://standards.sae.org/as5506a/
[15] TIMMO-2-USE
[16] Specification of Operating System AUTOSAR_CP_SWS_OS
[17] Methodology for Adaptive Platform AUTOSAR_AP_TR_Methodology
[18] Scheduling algorithms for multiprogramming in a hard real-time environment http://cn.el.yuntech.edu.tw/course/95/real_time_os/present paper/Scheduling Algorithms for Multiprogramming in a Hard-.pdf
[19] Controller Area Network (CAN) Schedulability Analysis:Refuted, Revisited and Revised http://dl.acm.org/citation.cfm?id=1227696
[20] Pushing the limits of CAN-Scheduling frames with offsets provides a major performance http://www.loria.fr/ nnavet/publi/erts2008_offsets.pdf
[21] Probabilistic response time bound for CAN messages with arbitrary deadlines http://ieeexplore.ieee.org/xpl/abstractAuthors.jsp?arnumber=6176662
[22] The Esterel synchronous programming language:design, semantics, implementa- tion
Glossaryも掲載しましょう。
https://www.autosar.org/fileadmin/standards/R23-11/FO/AUTOSAR_FO_TR_Glossary.pdf
補足資料（Additions）
祝休日・謹賀新年：2024年の目標
https://qiita.com/kaizen_nagoya/items/b659d922327a7dcdc898
2023 Countdown Calendar 主催・参加一覧
https://qiita.com/kaizen_nagoya/items/c4c2f08ac97f38d08543
CountDownCalendar月間 いいねをいただいた記事群 views 順
https://qiita.com/kaizen_nagoya/items/583c5cbc225dac23398a
Countdown Calendar 2023, 百記事目を書くにあたって。
https://qiita.com/kaizen_nagoya/items/45185a04cfd88b71256a
1年間をまとめた「振り返りページ」＠２０２３
https://qiita.com/kaizen_nagoya/items/bcd1ebd49d3a9e8c7a90
AUTOSAR 文書番号
https://qiita.com/kaizen_nagoya/items/8b894228a0b76c2265c7
AUTOSAR Countdown Calendar 2023
https://qiita.com/advent-calendar/2023/autosar
＜この記事は個人の過去の経験に基づく個人の感想です。現在所属する組織、業務とは関係がありません。＞
This article is an individual impression based on the individual's experience. It has nothing to do with the organization or business to which I currently belong.
文書履歴(document history)
ver. 0.01 初稿 20240102
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