はじめに
前回はZYBO対応の環境を作成しました。今回はこの環境をZYBO-Z7に対応させてみます。
コンテナログイン後の作業
Docker上で生成されたコンテナで起動しているOS(Ubuntu 18.04)の作業です。
ここでは、前回の手順に沿って、bitbakeによるビルドが完了した時点からおこないます。
デバイスツリーの変更
Linuxブート上で、ZYBOとZYBO-Z7の最大の違いはPSへのクロック周波数が異なる(それぞれ50、33MHz)ことで、ZYBOのままZYBO-Z7に適用するとコンソールのログが文字化けしてしまいます。そこでデバイスツリーを修正します。
具体的には、下記の通り、u-bootとLinux kernelに記述されているdtsファイルを修正します。
./tmp/work/zybo_zynq7-poky-linux-gnueabi/u-boot/1_2018.01-r0/git/arch/arm/dts/zynq-zybo.dts
./tmp/work-shared/zybo-zynq7/kernel-source/arch/arm/boot/dts/zynq-zybo.dts
変更内容は下記の通りです。
zynq-zybo.dts
@@ -22,7 +22,7 @@
memory@0 {
device_type = "memory";
- reg = <0x0 0x20000000>;
+ reg = <0x0 0x30000000>;
};
chosen {
@@ -38,7 +38,7 @@
};
&clkc {
- ps-clk-frequency = <50000000>;
+ ps-clk-frequency = <33333333>;
};
&gem0 {
上記のmemory項は、ZYBO-Z7はメインメモリが1GBに対応させたものです。
これを変更した後、下記の通りbitbakeコマンドにてu-bootとLinux kernelを再コンパイルし、その後イメージを再生成させます。
u-bootとLinux kernel以外は生成済みなので、この作業はすぐに終了します。
root@6448e893b697:/home/build# MACHINE=zybo-zynq7 bitbake u-boot -c compile -f
root@6448e893b697:/home/build# MACHINE=zybo-zynq7 bitbake linux-xlnx -c compile -f
root@6448e893b697:/home/build# MACHINE=zybo-zynq7 bitbake core-image-minimal
上記以降の作業は前回と同様なので省略します。
ZYBO-Z7のSDブートログ
U-Boot SPL 2018.01 (May 29 2018 - 08:39:42)
mmc boot
Trying to boot from MMC1
spl_load_image_fat_os: error reading image system.dtb, err - -2
reading u-boot.img
reading u-boot.img
U-Boot 2018.01 (May 29 2018 - 08:39:42 +0000)
Model: Zynq ZYBO Development Board
Board: Xilinx Zynq
Silicon: v3.1
I2C: ready
DRAM: ECC disabled 768 MiB
MMC: sdhci@e0100000: 0
SF: Detected s25fl128s_64k with page size 256 Bytes, erase size 64 KiB, total 16 MiB
*** Warning - bad CRC, using default environment
In: serial@e0001000
Out: serial@e0001000
Err: serial@e0001000
Net: ZYNQ GEM: e000b000, phyaddr 0, interface rgmii-id
I2C EEPROM MAC address read failed
Warning: ethernet@e000b000 (eth0) using random MAC address - ba:24:55:7e:f8:4f
eth0: ethernet@e000b000
reading uEnv.txt
479 bytes read in 12 ms (38.1 KiB/s)
Importing environment from mmc ...
Checking if uenvcmd is set ...
Running uenvcmd ...
reading uImage
3956792 bytes read in 330 ms (11.4 MiB/s)
reading uImage-zynq-zybo.dtb
9222 bytes read in 20 ms (450.2 KiB/s)
## Booting kernel from Legacy Image at 02080000 ...
Image Name: Linux-4.14.0-xilinx-v2018.1
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3956728 Bytes = 3.8 MiB
Load Address: 00008000
Entry Point: 00008000
Verifying Checksum ... OK
## Flattened Device Tree blob at 02000000
Booting using the fdt blob at 0x2000000
Loading Kernel Image ... OK
Loading Device Tree to 1fffa000, end 1ffff405 ... OK
Starting kernel ...
Booting Linux on physical CPU 0x0
Linux version 4.14.0-xilinx-v2018.1 (oe-user@oe-host) (gcc version 7.3.0 (GCC)) #1 SMP PREEMPT Tue May 29 07:37:41 UTC 2018
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt: Machine model: Zynq ZYBO Development Board
Memory policy: Data cache writealloc
cma: Reserved 16 MiB at 0x2f000000
random: fast init done
percpu: Embedded 16 pages/cpu @ee9c8000 s34764 r8192 d22580 u65536
Built 1 zonelists, mobility grouping on. Total pages: 195072
Kernel command line: earlyprintk console=ttyPS0,115200 root=/dev/mmcblk0p2 rw rootwait
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 752772K/786432K available (6144K kernel code, 238K rwdata, 1560K rodata, 1024K init, 153K bss, 17276K reserved, 16384K cma-reserved, 0K highmem)
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
vmalloc : 0xf0800000 - 0xff800000 ( 240 MB)
lowmem : 0xc0000000 - 0xf0000000 ( 768 MB)
pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
.text : 0xc0008000 - 0xc0700000 (7136 kB)
.init : 0xc0900000 - 0xc0a00000 (1024 kB)
.data : 0xc0a00000 - 0xc0a3b8c0 ( 239 kB)
.bss : 0xc0a3b8c0 - 0xc0a61f84 ( 154 kB)
Preemptible hierarchical RCU implementation.
RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
Tasks RCU enabled.
RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
efuse mapped to f0800000
slcr mapped to f0802000
L2C: platform modifies aux control register: 0x02060000 -> 0x32460000
L2C: DT/platform modifies aux control register: 0x02060000 -> 0x32460000
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x46460001
zynq_clock_init: clkc starts at f0802100
Zynq clock init
sched_clock: 64 bits at 216MHz, resolution 4ns, wraps every 4398046511102ns
clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x31f84feb25, max_idle_ns: 440795209731 ns
Switching to timer-based delay loop, resolution 4ns
clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 826992825 ns
timer #0 at f080a000, irq=17
Console: colour dummy device 80x30
Calibrating delay loop (skipped), value calculated using timer frequency.. 433.33 BogoMIPS (lpj=2166666)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
CPU: Testing write buffer coherency: ok
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x100000 - 0x100060
Hierarchical SRCU implementation.
smp: Bringing up secondary CPUs ...
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
smp: Brought up 1 node, 2 CPUs
SMP: Total of 2 processors activated (866.66 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
futex hash table entries: 512 (order: 3, 32768 bytes)
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
cpuidle: using governor menu
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0xf0840000
zynq-pinctrl 700.pinctrl: zynq pinctrl initialized
e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 25, base_baud = 4166666) is a xuartps
console [ttyPS0] enabled
vgaarb: loaded
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
usb_phy_generic phy0: phy0 supply vcc not found, using dummy regulator
media: Linux media interface: v0.10
Linux video capture interface: v2.00
pps_core: LinuxPPS API ver. 1 registered
pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
PTP clock support registered
EDAC MC: Ver: 3.0.0
FPGA manager framework
fpga-region fpga-full: FPGA Region probed
Advanced Linux Sound Architecture Driver Initialized.
clocksource: Switched to clocksource arm_global_timer
NET: Registered protocol family 2
TCP established hash table entries: 8192 (order: 3, 32768 bytes)
TCP bind hash table entries: 8192 (order: 4, 65536 bytes)
TCP: Hash tables configured (established 8192 bind 8192)
UDP hash table entries: 512 (order: 2, 16384 bytes)
UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
hw perfevents: no interrupt-affinity property for /pmu@f8891000, guessing.
hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
workingset: timestamp_bits=30 max_order=18 bucket_order=0
jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc.
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
io scheduler mq-deadline registered
io scheduler kyber registered
dma-pl330 f8003000.dmac: Loaded driver for PL330 DMAC-241330
dma-pl330 f8003000.dmac: DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16
brd: module loaded
loop: module loaded
zynq-qspi e000d000.spi: couldn't determine configuration info
zynq-qspi e000d000.spi: about dual memories. defaulting to single memory
libphy: Fixed MDIO Bus: probed
CAN device driver interface
libphy: MACB_mii_bus: probed
macb e000b000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000b000 irq 27 (ba:24:55:7e:f8:4f)
RTL8211E Gigabit Ethernet e000b000.ethernet-ffffffff:00: attached PHY driver [RTL8211E Gigabit Ethernet] (mii_bus:phy_addr=e000b000.ethernet-ffffffff:00, irq=POLL)
e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci-pci: EHCI PCI platform driver
usbcore: registered new interface driver usb-storage
chipidea-usb2 e0002000.usb: e0002000.usb supply vbus not found, using dummy regulator
ci_hdrc ci_hdrc.0: EHCI Host Controller
ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1
ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
i2c /dev entries driver
IR NEC protocol handler initialized
IR RC5(x/sz) protocol handler initialized
IR RC6 protocol handler initialized
IR JVC protocol handler initialized
IR Sony protocol handler initialized
IR SANYO protocol handler initialized
IR Sharp protocol handler initialized
IR MCE Keyboard/mouse protocol handler initialized
IR XMP protocol handler initialized
cdns-wdt f8005000.watchdog: Xilinx Watchdog Timer at f0944000 with timeout 10s
EDAC MC: ECC not enabled
Xilinx Zynq CpuIdle Driver started
sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
sdhci-pltfm: SDHCI platform and OF driver helper
mmc0: SDHCI controller on e0100000.sdhci [e0100000.sdhci] using ADMA
ledtrig-cpu: registered to indicate activity on CPUs
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
fpga_manager fpga0: Xilinx Zynq FPGA Manager registered
NET: Registered protocol family 10
Segment Routing with IPv6
sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
NET: Registered protocol family 17
can: controller area network core (rev 20170425 abi 9)
NET: Registered protocol family 29
can: raw protocol (rev 20170425)
can: broadcast manager protocol (rev 20170425 t)
can: netlink gateway (rev 20170425) max_hops=1
Registering SWP/SWPB emulation handler
hctosys: unable to open rtc device (rtc0)
of_cfs_init
of_cfs_init: OK
ALSA device list:
No soundcards found.
Waiting for root device /dev/mmcblk0p2...
mmc0: new high speed SDHC card at address 59b4
mmcblk0: mmc0:59b4 USDU1 14.9 GiB
mmcblk0: p1 p2
EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities
EXT4-fs (mmcblk0p2): recovery complete
EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
VFS: Mounted root (ext4 filesystem) on device 179:2.
devtmpfs: mounted
Freeing unused kernel memory: 1024K
INIT: version 2.88 booting
Starting udev
udevd[701]: starting version 3.2.5
udevd[702]: starting eudev-3.2.5
EXT4-fs (mmcblk0p2): re-mounted. Opts: data=ordered
Tue May 29 08:21:17 UTC 2018
INIT: Entering runlevel: 5
Configuring network interfaces... IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
udhcpc: started, v1.27.2
udhcpc: sending discover
udhcpc: sending discover
macb e000b000.ethernet eth0: unable to generate target frequency: 125000000 Hz
macb e000b000.ethernet eth0: link up (1000/Full)
IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
udhcpc: sending discover
udhcpc: no lease, forking to background
done.
Starting syslogd/klogd: done
Poky (Yocto Project Reference Distro) 2.5 zybo-zynq7 /dev/ttyPS0
zybo-zynq7 login: