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概要 

windowsでiverilogやってみた。
練習問題やってみた。

練習問題

stackを実装せよ。

サンプルコード


module stack(input clk, input rst, input set, input push, input pop, input [15:0] data, output [15:0] qtop, output [15:0] qnext);
    parameter N = 8;
    integer i;
    reg [15:0] q [0:N - 1];
    assign qtop = q[0];
    assign qnext = q[1];
    always @(posedge clk)
    begin
        if (rst)
            q[0] <= 0;
        else if (set)
            q[0] <= data;
        else if (pop)
            q[0] <= q[1];
    end
    always @(posedge clk)
    begin
        for (i = 1; i < N - 1; i = i + 1)
            if (rst)
                q[i] <= 0;
            else if (push)
                q[i] <= q[i - 1];
            else if (pop)
                q[i] <= q[i + 1];
    end
    always @(posedge clk)
    begin
        if (rst)
            q[N - 1] <= 0;
        else if (push)
            q[N - 1] <= q[N - 2];
    end
endmodule


テストベンチ

module test;
    reg clk;
    reg rst;
    reg set,
        push,
        pop;
    reg [15:0] data;
    wire [15:0] qtop,
        qnext;
    stack u(.clk(clk), .rst(rst), .set(set), .push(push), .pop(pop), .data(data), .qtop(qtop), .qnext(qnext));
    initial
    begin
        $display("set, push, pop, data, qtop, qnext");
        $monitor("%d   %d   %d   %d   %d   %d", set, push, pop, data, qtop, qnext);
        clk = 1;
        rst = 0;
        set = 0;
        push = 0;
        pop = 0;
        data = 0;
        #2
            rst = 1;
        #2
            rst = 0;
            set = 1;
            data = 1;
        #2
            set = 0;
            push = 1;
        #2
            push = 0;
        #2
            set = 1;
            data = 2;
        #2
            set = 0;
        #2
            pop = 1;
        #2
            pop = 0;
        #2
            pop = 1;
        #2
            pop = 0;
        #2
            $finish;
    end
    always
        #1
            clk = ~clk;
endmodule

実行結果

set, push, pop, data, qtop, qnext
0   0   0       0       x       x
0   0   0       0       0       0
1   0   0       1       1       0
0   1   0       1       1       1
0   0   0       1       1       1
1   0   0       2       2       1
0   0   0       2       2       1
0   0   1       2       1       0
0   0   0       2       1       0
0   0   1       2       0       0
0   0   0       2       0       0

以上

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