In-Depth Guide to MOSFET Physics and Equations

This article provides a deeper look into the physical principles governing MOSFET behavior, especially focusing on threshold voltage $V_T$ and I–V characteristics.

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🧠 1. What Is Threshold Voltage?

Threshold voltage $V_T$ is the gate voltage at which a strong inversion layer forms in the semiconductor, enabling current flow between source and drain.

Physical Process Behind $V_T$

1. Initial state: Gate voltage $V_G = 0$, p-type substrate full of holes.

2. Increasing $V_G$:

   • Positive $V_G$ repels holes.
   • Depletion region forms: only immobile negative acceptor ions remain.

3. Further $V_G$:

   • Electrons accumulate near the interface.
   • These mobile carriers create a conductive n-channel → transistor "turns on".

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📐 2. Equation for Threshold Voltage $V_T$

$$
V_T = \phi_{ms} + 2\phi_f + \frac{\sqrt{4q \varepsilon_s N_A \cdot 2\phi_f}}{C_{ox}}
$$

Term-by-Term Breakdown:

Term	Meaning
$\phi_{ms}$	Work function difference between gate metal and semiconductor
$2\phi_f$	Twice the Fermi potential, indicating energy needed to reach inversion
$q$	Elementary charge (≈ $1.6 \times 10^{-19}$ C)
$\varepsilon_s$	Permittivity of the semiconductor
$N_A$	Acceptor doping concentration (defines how many holes are in the substrate)
$C_{ox}$	Gate oxide capacitance per unit area = $\varepsilon_{ox} / t_{ox}$

🧪 Physical Meaning

• The square-root term relates to the depletion charge in the semiconductor.
• $C_{ox}$ determines how effectively the gate voltage controls the channel — thinner oxides increase capacitance, lowering $V_T$.
• Higher doping $N_A$ increases the amount of charge needed to invert → raises $V_T$.

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⚡ 3. MOSFET Drain Current Equation

In the linear (ohmic) and saturation regions, the drain current $I_D$ depends on terminal voltages and channel physics.

Linear Region (Triode):

When $V_{DS} < V_{GS} - V_T$:

$$
I_D = \mu_n C_{ox} \frac{W}{L} \left[ (V_{GS} - V_T) V_{DS} - \frac{V_{DS}^2}{2} \right]
$$

Saturation Region:

When $V_{DS} \geq V_{GS} - V_T$:

$$
I_D = \frac{1}{2} \mu_n C_{ox} \frac{W}{L} (V_{GS} - V_T)^2
$$

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🔍 Explanation of Parameters

Symbol	Meaning
$\mu_n$	Electron mobility (how easily electrons move in silicon)
$C_{ox}$	Gate capacitance per unit area
$W$	Transistor width (how wide the channel is)
$L$	Effective channel length
$V_{GS}$	Gate-Source voltage
$V_{DS}$	Drain-Source voltage
$V_T$	Threshold voltage (from earlier equation)

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💡 Where Does the Current Come From?

It’s all about:

• Electrostatics: Gate voltage attracts or repels carriers
• Carrier transport: Electrons flow from source to drain when a channel exists
• Field effect: Voltage applied to gate modulates conductivity of channel

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🧠 Bonus: Current from Charge × Velocity

More generally:

$$
I_D = Q_t \cdot v
$$

• $Q_t$: Charge per unit length in the channel (C/m)
• $v$: Average velocity of the carriers (m/s)

This matches with:

• $Q_t = C_{ox}(V_{GS} - V_T)$
• $v = \mu_n E = \mu_n V_{DS}/L$

→ Plugging into $I = Q \cdot v$ leads to the linear-region formula above.

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🧪 Summary

Parameter	Controls
$V_T$	Device structure (doping, oxide thickness)
$I_D$	Gate voltage, channel geometry, oxide properties
Mobility $\mu$	Temperature, material quality
$C_{ox}$	Thickness of oxide layer
$L$, $W$	Design/layout choice

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