Zybo > Chronicles blog 14 > PLL > ARM PLL / I/O PLL / DDR PLL

MicroZed Chronicles リスト http://adiuvoengineering.com/?page_id=285
@ Adam Taylor blog
https://forums.xilinx.com/t5/Xcell-Daily-Blog/MicroZed-Timers-Clocks-and-Watchdogs-Adam-Taylor-s-MicroZed/ba-p/399219

The PS clock provided by the hardware drives three PLLs (phase-locked loops), which are used to multiply the Zynq’s input clock frequency. Each of these PLLs has a different function within the Zynq PS (processor system):

PSサイドでは3つのPLLがある

• ARM PLL - Usually used to clock the CPU, SCU, OCM and AXI GP Interconnect
• I/O PLL – Used to clock the I/O Peripherals
• DDR PLL – used to clock the DDR memory and the AXI HP (high-performance) interconnect