MicroZed Chronicles リスト http://adiuvoengineering.com/?page_id=285
@ Adam Taylor blog
https://forums.xilinx.com/t5/Xcell-Daily-Blog/Meet-the-Zynq-MIO-Adam-Taylor-s-MicroZed-Chronicles-Part-9/ba-p/386661
you can extend the MIO into the Programmable Logic (PL) side of the Zynq SoC. This is called Extended Multipurpose IO or EMIO. EMIO can provide up to 64 additional GPIO pins
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The GPIO will be split into two banks of 32 bits each if the maximum 64-bit size is selected.
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Note: Because the EMIO is within the PL side of the Zynq SoC, do not forget to the enable the level shifters between the PS and PL to ensure correct operation.