Ubuntu 18.04 LTS
Board: STM32L476 Nucleo_64 (hereafter STM32L476)
Board: STM32F769 Discovery Kit (hereafter STM32F769)
Zephyr 2.1.99
microSD module: CK-40 (SUNHAYATO)
logic monitor: Analog Discovery 2 (hereafter、AD2)
Summary
- Project:
samples/subsys/fs/fat_fs
- failed in either of
-
- sending CMD0 (0x40 ....) : send 0x20 ... instead
-
- receiving 0x01 : receives 0xC0 or 0xE0
-
How to reproduce
Board
- STM32F769 Discovery Kit
- microSD CK-40
Connection between CK-40 (microSD) and STM32F769
- Left: CK-40, Right: STM32F769
- DO(MISO) --------------- CN9:5 (PB14)
- VSS -------------------- CN9:7 (GND)
- CLK -------------------- CN9:6 (PA12)
- VDD -------------------- CN11:4 (3V3)
- CMD/DI(MOSI) ------------ CN9:4 (PB15)
-
CS------4.7k(up) ------ CN9:3 (PA11)<<< Mistake! - CS ------ 4.7k(up) ------ CN9:2 (PH6) <<< Correct (March. 12, 2020)
prj.conf
I used SPI2 for STM32F769.
CONFIG_SPI=y
# CONFIG_SPI_1=y
CONFIG_SPI_2=y
CONFIG_DISK_ACCESS=y
CONFIG_DISK_ACCESS_SDHC=y
CONFIG_DISK_ACCESS_SPI_SDHC=y
CONFIG_LOG=y
CONFIG_FILE_SYSTEM=y
CONFIG_FAT_FILESYSTEM_ELM=y
CONFIG_PRINTK=y
overlay
I prepared the overlay file for STM32F769 as stm32f769i_disco.overlay
.
/*
2019-12-15
branched from [nrf52840_blip.overlay]
*/
/*
* Copyright (c) 2019 Tavish Naruka <tavishnaruka@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
&spi2 {
status = "okay";
cs-gpios = <&gpioh 6 0>;
sdhc0: sdhc@0 {
compatible = "zephyr,mmc-spi-slot";
reg = <0>;
status = "okay";
label = "SDHC0";
spi-max-frequency = <24000000>;
};
};
build and run
$ west build -p auto -b stm32f769i_disco samples/subsys/fs/fat_fs/
$ west flash
$ west flash
(The second of the west flash
is just in case).
$ west debug
[here I set up the logic monitor to start recording]
(gdb) c
Result > Case A (Failue in sending CMD0)
The CMD0 command is garbled as 0x20 0x00 0x00 0x00 0x00 0x4A
instead of 0x40 0x00 0x00 0x00 0x00 0x94
.
Result > Case B (Success in sending CMD0, but failed in receiving 0x01)
The CMD0 command is sent, but received 0xE0 and 0x7F instead of 0x01.
Result > Case C (Success in sending CMD0, but failed in receiving 0x01)
The CMD0 command is sent, but received 0xC0 instead of 0x01.
Appendix
with STM32L476
With STM32L476 and CK-40, the sample project works fine.
- STM32L476 + SPI1: O.K.
- STM32L476 + SPI2: O.K.
- STM32F769 + SPI2: N.G.
logic with STM32L476 (O.K.)
80 Clocks, CMD0 and receiving 0x01
Related forum post
I have posted the question on the forum. Then I made this article because the forum post is not good to read through.
Fixed (2020-03-17)